NIT Silchar to Host Training Programme on VLSI Designing

HTCampus Expert updated on : 27 Apr 2016
10

The last date to apply for the training programme at NIT Silchar is April 30, 2016.

National Institute of Technology, Silchar will organise a 15-days hands-on training programme on ‘VLSI Designing using Cadence Suit/Synopsys’.
 
The training programme is scheduled into two sessions. The first session will be conducted between May 20 and June 6 while the second one will start on June 24 and will run through July 11, 2016.
 
The training programme intends to provide a common platform to the research scholars to enhance their knowledge in the area of digital IC Design.
 
Target Participants:
 
  • B.Tech/M.Tech/Ph.D students
  • B.Sc/M.Sc in relevant field
  • Faculty
 
Important Dates:
 
  • Registration process starts on: March 16, 2016
  • The last date to submit the application form: April 30, 2016.
 
Registration Fee:
 
  • For students: INR 5000
  • For Faculty: INR 8000
 
Mode of Payment:
 
The registration fee must be sent as demand draft in favour of Director, NIT Silchar, payable at SBI NIT branch.
 
The fee also can be paid through online mode in favour of Director, NIT Silchar, 
  • A/c no.: 10521277057
  • IFSC code: SBIN0007061
  • MICR code: 788002004
 
 
Source: Ghufran Alam Siddiqui, HTCampus Specialist 
 

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